1. Field of the Invention
This invention relates generally to telemetry instrumentation and particularly to a programmable pulse code modulation (PCM) encoder for encoding telemetry data.
2. Description of the Prior Art
Pulse code modulation is a sampling technique for digitizing analog signals. PCM samples the signal 8000 times per second, and each sample is represented by 8 bits for a total of 64 Kb per second. PCM is used with carrier systems that combine PCM signals from many lines and transmit them over a single cable or other medium.
Previous telemetry instrumentation required a custom PCM encoder made of several separate sub components. These sub components have included an analog signal multiplexer to provide a path from the signal being sampled to the input of an analog to digital (A/D) converter. The A/D converter is used to digitize the analog signal selected by the multiplexer. A typical custom PCM encoder also includes a universal asynchronous receiver, a logic controller and a parallel to serial converter. The universal asynchronous receiver receives data from a digital source such as a GPS receiver. The logic controller controls various sub components and formats the PCM data stream. The parallel to serial converter provides a continuous serial PCM output stream.
The logic controller is typically a field programmable gate array (FPGA) set up as a sequencer with its control store including either an external PROM or an internal discrete logic circuit. Because the logic of the FPGA (or code in the PROM) must be programmed by the original equipment manufacturer before being delivered to the user, the resultant PCM encoder is usable only for one, or, at most, a limited set of telemetry instrumentation applications.
This invention is directed to a programmable PCM encoder that may be used in a variety of telemetry instrumentation applications.
A PCM encoder according to the present invention comprises a programmable controller arranged to receive a digital signal input and a plurality of parallel analog signal inputs. The said programmable controller is arranged to digitize the parallel analog signal inputs and modulate them with the digital signal input. A system clock is included to provide clock signals. A counter circuit is connected to the programmable controller to provide interrupt signals under the control of the system clock. A shift register is connected to the programmable controller to receive modulated parallel digital signals corresponding to the parallel analog signal inputs to the programmable controller. The shift register is also connected to the counter and is arranged to function as a parallel to serial converter to provide a serial data stream output at an output terminal of the shift register.
The pulse code modulation encoder according to the present invention preferably further comprises an operational amplifier array arranged to provide the parallel analog signal inputs to the programmable controller.
The invention preferably further comprises a line receiver connected to the programmable controller. The line receiver is arranged to receive a balanced digital and provide a unipolar digital signal to the programmable controller for modulating digital signals corresponding to the parallel analog signal inputs.
The pulse code modulation encoder according to the present invention preferably further comprises an output buffer connected to the output terminal of the shift register; and a filter circuit connected to the output buffer to provide a filtered, encoded signal output.
The structure and function of the invention may be best understood by referring to the accompanying drawings, which are not to scale, and to the following detailed description.